1. Field of the Invention
The present invention relates to the realigning of the local oscillators of a receiver making it possible to receive a signal modulated by at least one circuit for inverse fast Fourier Transform computation according to a multicarrier modulation of OFDM (Orthogonal Frequency Division Multiplexing) type.
2. Description of the Related Art
In the International Patent Application PCT/FR 89/00546 filed in the name of THOMSON-CSF, there is described a method for transmitting modulated waves using a plurality of frequencies simultaneously, comprising successive steps of transmission of symbols for a duration T+.DELTA.T, two transmission frequencies being 1/T apart, T being the useful transmission interval and .DELTA.T being the transition interval. In the above patent application, there is also described a transmitter and a receiver enabling this method to be implemented by using, in the transmitter, a circuit for inverse fast Fourier transform (FFT.sup.-1) computation in order to carry out the modulation of the signal and, in the receiver, a circuit for fast Fourier Transform (FFT) computation in order to carry out the demodulation of the signal received. Furthermore, to enable the receiver to be synchronised with the transmitter, the spectrum of the modulated signal comprises two master lines having a fixed frequency difference between them. By using these two master lines, it is possible to slave the local oscillators as well as the sampling clock of the receiver. In the patent application mentioned above, there is therefore described a device for analog feedback control using the two master lines to control certain local oscillators of the receiver as well as the clock giving the sampling frequency.
As shown in FIG. 1, the feedback control device making it possible to realign the local oscillators of the receiver described in the above-mentioned patent application, comprises essentially a band-pass filter 2, a band-pass filter 3, a mixer 4 and a phase-lock loop (PLL) 1 generating a reference frequency for three other PLLS. The two filters 2 and 3 are connected in parallel and receive, among other things, at input two frequencies f.sub.A, f.sub.B, arising from the circuit for translating Intermediate Frequency into Baseband, as is explained in the above application. The outputs from the two band-pass filters 2 and 3 are sent to the mixer 4. The output f rom the mixer 4 is input to the phase-lock loop 1. This phase-lock loop comprises a mixer 5 whose output is connected to the input of a low-pass filter 6. The output of the low-pass filter 6 is connected to a voltage-controlled oscillator (VCO) 7. The output of the oscillator 7 is connected to the input of the phase-lock loop, namely on the other input of the mixer 5. The output from the phase-lock loop 1 is also input to three phase-lock loops 8, 9, 10. These phase-lock loops are frequency-division phase-lock loops. The phase-lock loops 8, 9, 10 constitute the outputs of the feedback control device and deliver frequency references to the various local oscillators, namely the local oscillator of the high frequency/intermediate frequency f'.sub.HF translation circuit, the sampling clock f.sub.e, local oscillator of the Intermediate Frequency to baseband f'.sub.i translation circuit.
The circuit described above operates as follows. The filter 2 selects the frequency f.sub.A namely the frequency of one of the two master lines transmitted by the transmitter. The filter 3 selects the frequency f.sub.B namely the frequency of the other master line. The mixer 4 performs the beating between the frequencies f.sub.A and f.sub.B. The phase-lock loop 1 delivers the value of the differences between frequencies f.sub.A and f.sub.B. The difference between the frequencies f.sub.A and f.sub.B on transmission, determined by the transmission standard, is known. Comparison on reception enables a frequency reference and phase reference to be delivered. The phase-lock loops 8, 9 and 10 therefore deliver frequency and phase references to the various local oscillators and to the sampling clock which are used in the receiver.